Author | Rob Jansen, Copyright © 2025..2025, all rights reserved. |
Adapted-by | |
Compiler | 2.5r9 |
Hardware implementation of I2C 2 (single) master.
Based on i2c_hardware.jal by Joep Suijs.
No dependency found
const _i2c_400khz2 = target_clock / 400_000 / 4 - 1
const _i2c_100khz2 = target_clock / 100_000 / 4 - 1
const _i2c_1mhz2 = target_clock / 1_000_000 / 4 - 1
const _i2c_slowest2 = 127
const _i2c_400khz2 = target_clock / 400_000 / 4 - 1
No documentation found
const _i2c_100khz2 = target_clock / 100_000 / 4 - 1
(default)
const _i2c_1mhz2 = target_clock / 1_000_000 / 4 - 1
No documentation found
const _i2c_slowest2 = 127
Some constants needed for the baudrate generator. Can be overruled by I2C_USER_BUS_SPEED2.
i2c_start2()
Sends Start bit and waits until finished or timeout (if defined)
i2c_restart2()
Sends Restart bit and waits until finished or timeout (if defined)
i2c_stop2()
Sends Stop bit and waits until finished or timeout (if defined)
i2c_initialize2()
if the device has changed, change the speed if necessary
i2c_transmit_byte2(byte in data) return bit
Returns TRUE when OK and FALSE in case of an error or when a timeout occurs (if defined)
i2c_receive_byte2(bit in ACK) return byte
start receiving of a byte and waits till finished or timeout (if defined) if param ACK is TRUE, the byte is acknowledged and next bytes can be received. if param ACK is FALSE, the byte is nacked and a stop *should be* sent.
16f18325 | 16f18325_i2c_hw2_l0.jal |
16f18425 | 16f18425_i2c_hw2_l0.jal |